Chao Yan is a Senior R&D Engineer with 12 years of experience bridging software development and hardware design, currently working on Synopsys' Saber platform in Hillsboro, Oregon. He holds a Ph.D. in Computer Science from UBC and brings deep expertise in formal verification, analog/mixed-signal verification, and algorithm design—having found 100+ bugs during Intel SOC CPU verification and built COHO, a reachability-based analog verification platform with ~50k lines of code. Proficient across languages from C/C++ and Java to Verilog/SystemVerilog and MATLAB, he combines RTL and SPICE-level toolchains with strong mathematical foundations for high-dimensional polyhedral algorithms and interval LP solvers. His background spans industry and academia, including path-finding work on AMS verification and applied research that accelerated circuit simulation at Rambus. Colleagues describe him as a meticulous problem-solver who translates theoretical methods into production-grade verification tools.
12 years of coding experience
10 years of employment as a software developer
Ph.D., Computer Science, Ph.D., Computer Science at The University of British Columbia
B.Sc, Computer Science, B.Sc, Computer Science at Peking University
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