Chase Cook is a Senior Signal Integrity Engineer with nine years of experience blending VLSI research and industrial practice to build automation tools and scalable SI analysis flows at Intel. With a PhD focus in VLSI simulation and EDA, he pairs deep device- and system-level reliability knowledge (electromigration, heterogeneous/accelerator computing) with applied machine learning to speed complex design verification. He has a track record of turning research prototypes into production-oriented simulation tooling—from Cadence and Intel internships to his current role—while mentoring students and teaching logic design. Based in California, Chase uniquely bridges academic rigor (3.95 PhD GPA) and hands-on software development for high-speed interfaces, often optimizing big-data workflows for circuit reliability studies.
9 years of coding experience
1 year of employment as a software developer
B.S., Computer Engineering, 3.44, B.S., Computer Engineering, 3.44 at California State University-Bakersfield
Doctor of Philosophy (PhD), Electrical Engineering, 3.95, Doctor of Philosophy (PhD), Electrical Engineering, 3.95 at University of California, Riverside
A.A.S., Electronics & Computer Technologies, 4.0, A.A.S., Electronics & Computer Technologies, 4.0 at DeVry University
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Chase Cook - Signal Integrity Engineer at Intel Corporation