R&D Manger at Shenzhen Kangxun Technology Co., Ltd
Shenzhen, Guangdong Province, China
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Summary
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Senior
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Top School
Cheng Wang is an R&D manager with nine years of experience specializing in pattern recognition, algorithms simulation, and automatic test systems for printed circuit boards. He has deep hands-on expertise in JTAG/boundary-scan, Verilog HDL, Cadence, Matlab and C/C++, delivering fault-diagnosis models for DDRx/Flash and ATPG-driven test solutions for ICT instruments. His work spans industry and academia—from leading instrument teams at ZTE to applied research as a visiting scholar at Peking University Shenzhen—bridging rigorous measurement-instrument PhD training with practical product delivery. Based in Shenzhen, he combines low-level board diagnostics and protocol testing (I2C/SPI) with system-level test automation, often implementing large C++ codebases for production test tools. An understated strength is his ability to translate academic measurement techniques into scalable, field-ready test systems that reduce board-level failure analysis time.
9 years of coding experience
6 years of employment as a software developer
Ph.D., Measurement technique and instrument, Ph.D., Measurement technique and instrument at University of Electronic Science and technology
Master's degree, Electric motor & Auto-Control, Master's degree, Electric motor & Auto-Control at South China University of Technology
Contributions:24 commits, 22 pushes, 1 branch in 1 day
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Cheng Wang - R&D Manger at Shenzhen Kangxun Technology Co., Ltd