Summary
Cheng-yi Lin is a product characterization and yield management engineer with nine years of experience at IBM, specializing in data-driven root-cause analysis for 14nm/22nm high-performance server processors. He combines device-physics expertise from UCLA and National Tsing Hua University with hands-on data engineering skills—Python, SAS, SQL, Dash—and has built automated pipelines and visualization tools to accelerate yield improvement. Cheng-yi’s background in TCAD, ADC/FFT implementation, and sensor readout hardware gives him a rare cross-disciplinary view that connects semiconductor process nuances to actionable analytics. At IBM he has driven investigations into eDRAM failure patterns, implemented daily regression analyses via cron-enabled scripts, and coordinated multi-team failure analysis to improve manufacturability. Based in East Fishkill, NY, he brings both lab-level circuit and materials research experience and production-scale data mining to tackle complex semiconductor yield challenges.
9 years of coding experience
1 year of employment as a software developer
Bachelor's Degree, Power Mechanical Engineering, Bachelor's Degree, Power Mechanical Engineering at National Tsing Hua University
Master's Degree, Electrical Engineering, Master's Degree, Electrical Engineering at University of California, Los Angeles
English, Chinese