Chia-wei Chang is a Senior Design Verification Engineer based in Hsinchu with two decades of DV experience and over a decade focused on professional roles across ASIC, SoC and mixed-signal verification. He currently leads SERDES mixed-signal verification at NVIDIA, building and maintaining UVM testbenches, reference models and automated flows, and previously managed high-speed I/O and PMIC verification teams for companies like MegaChips, Broadcom and Richtek. He combines deep protocol-level VIP development (USB, MIPI, PCIe) with hands-on automation, coverage-driven methodologies and formal verification experience, and has a track record of standing up whole-chip UVM environments from scratch. Known for mentoring junior engineers and improving verification productivity via scripting and toolchain enhancements, he also brings system-level test and production test insights from earlier test-engineer roles. An incomplete PhD and long tenure in both customer-facing VIP projects and internal tapeout delivery give him a rare blend of academic rigor and practical, delivery-focused expertise.
11 years of coding experience
18 years of employment as a software developer
Doctor of Philosophy (Ph.D.), Electrical and Electronics Engineering, Incomplete, Doctor of Philosophy (Ph.D.), Electrical and Electronics Engineering, Incomplete at National Central University
Master's Degree, Electrical and Electronics Engineering, Master's Degree, Electrical and Electronics Engineering at National Chung Hsing University
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