Summary
Chuong Le is a Senior Software Engineer and project lead with over a decade of experience in ASIC design and verification, and more than five years focused on MCU virtual platform (VPF) modeling and early software prototyping. At Renesas Design Vietnam he leads a team of 12+ engineers building and maintaining VLAB-style MCU models using C++, SystemC, and TLM for architecture validation, performance testing, and hardware verification. His background spans hands-on Verilog hardware design, formal verification, and deep debugging/troubleshooting to resolve customer-facing model issues. He holds an MS in Microelectronics and a BE in Electronics, combining academic rigor with practical delivery in embedded systems. A less obvious strength is his ability to bridge silicon-centric verification practices with software-on-target workflows, enabling earlier and more reliable software development on virtual platforms.
3 years of coding experience
7 years of employment as a software developer
Bachelor of Engineering - BE, Electronics, Bachelor of Engineering - BE, Electronics at Ho Chi Minh University of Technology
Master of Science - MS, Microelectronics, Master of Science - MS, Microelectronics at VNUHCM - University of Science