Clara Short
FPGA Design Engineer at HPR (Hyannis Port Research)
Greater Boston United States
Summary
👤
Senior🎓
Top SchoolClara Short is an FPGA design and silicon validation engineer with 11 years of experience building post-silicon debug and bringup tooling for SoCs, most recently enabling Design-for-Debug workflows and cross-trigger validation at Apple. She blends hardware rigor with pragmatic software craftsmanship—shipping tools that extract RTL debug metadata, extend kernels and bootloaders, and materially reduce bringup time for triage teams. Comfortable leading cross-functional discussions with IP designers and training engineers in the lab, she prefers distributed teams where collaboration is enforced by code and pull requests, not titles. A former submarine officer and control-systems engineer, she brings disciplined systems thinking and a knack for automating tedious validation tasks that once cost teams dozens of hours. Remote-first and hands-on for A0 bringups, she also runs a small passion project company, Autonoë Systems, that produces engineer-focused tooling and experiments.
11 years of coding experience
9 years of employment as a software developer
Master of Science - MS Electrical and Computer Engineering, Master of Science - MS Electrical and Computer Engineering at The University of Texas at AustinBachelor of Science - BS Electrical Engineering, Bachelor of Science - BS Electrical Engineering at United States Naval Academy
Github Skills (5)
tis-10010
spoiler9
linux2
installer2
keybase1
Programming languages (5)
Github contributions (5)
kk4ead/tis-100
Jun 2018 - Sep 2018
An (eventually) comprehensive spoiler for TIS-100
Contributions:4 commits, 13 PRs, 69 pushes in 3 months
comprehensivetistis-100spoiler
kk4ead/kk4ead.github.io
Feb 2015 - Sep 2018
Contributions:23 pushes in 3 years 8 months
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