Cody Cziesler
SMTS Digital IC Design Engineer at AMD
Village of Fairport, New York, United States
Summary
👤
Senior🎓
Top SchoolCody Cziesler is a seasoned digital IC design and verification engineer with 12 years of experience building SoCs, processor architectures, and low-power DSP solutions across consumer imaging and human-interface products. Currently an SMTS at AMD, he has a strong track record designing power delivery and DDR PHY ASICs and previously architected a low-power pipelined vector processor for on-sensor DNN inference at Sony that cut inference time and power dramatically. Cody combines hands-on RTL design, constrained-random verification, and automation—having built simulation/regression tooling and firmware debuggers that bridge RTL and software. He excels at cross-disciplinary collaboration with analog, firmware, and algorithm teams to turn algorithmic needs into efficient silicon, and often uncovers system-level wins by profiling firmware and reshaping hardware resources. Based in Fairport, NY, he brings practical system thinking to performance- and power-constrained designs, with a knack for integrating diverse IP and accelerating development through scripting and automation.
12 years of coding experience
13 years of employment as a software developer
BS/MS, Computer Engineering, BS/MS, Computer Engineering at Rochester Institute of TechnologyAdvanced Regents Diploma, Advanced Regents Diploma at Chittenango High School
English, French
Github Skills (32)
nasm3
retrocomputing3
c642
genesis2
sega-genesis2
amiga2
commodore2
sdcc2
z802
origami2
apple22
cpm2
cubing2
680002
megadrive2
Programming languages (1)
Github contributions (5)
cziesler/cziesler.github.io
Dec 2013 - Feb 2019
Contributions:6 commits, 29 pushes in 5 years 2 months
cziesler/dotfiles
Jul 2015 - Apr 2022
Contributions:31 pushes in 6 years 9 months
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