Summary
Cq Tang is a Principal Engineer based in Dublin, California with 13 years focused on high-speed, OS-bypass network stacks spanning HPC applications, MPI, interconnect libraries, drivers and hardware. He has driven networking work across industry leaders—Cerebras (TCP/IP and RoCE), Intel (GPU Linux drivers and Omni-Path generations), QLogic and HP—bringing deep expertise in InfiniBand, PSM, and multi-rail architectures. Cq’s career blends low-latency protocol design with production driver and firmware collaboration, enabling measurable performance gains in real-world HPC deployments. He is comfortable across the full stack from MPI tuning to kernel-level networking and often operates at the intersection of hardware constraints and software design. A Tsinghua-trained engineer, he pairs rigorous academic grounding with a practical track record of shipping high-performance interconnect solutions.
13 years of coding experience
21 years of employment as a software developer
Master's degree Electrical and Electronics Engineering, Master's degree Electrical and Electronics Engineering at Tsinghua University