Summary
Cyril Bresch is a hardware and software security leader with 8 years of experience, currently co-founding and serving as CTO of Wotena to rethink silicon security from reactive patching to proactive, continuous defense. His background spans industry and academia—PhD-driven research on control-flow integrity and cyber-physical systems at Université Grenoble Alpes and the University of Arizona, plus hands-on engineering at SiFive where he quantified timing side-channels and designed Spectre-resistant branch predictors and IOMMU cache architectures. He combines deep compiler, pipeline and formal verification experience (JasperGold, UVM) with practical embedded systems work, from LLVM-based mitigations to IoMT prototypes. Based in Marseille, he blends researcher rigor with product-building instincts and a penchant for turning complex hardware threats into measurable, automatable defenses. An often-overlooked strength is his cross-layer fluency: he reasons across silicon, firmware and toolchains to deliver end-to-end security guarantees.
8 years of coding experience
8 years of employment as a software developer
Second Place at CSAW ESC 2016, Second Place at CSAW ESC 2016 at NYU Tandon School of Engineering
PCSI - PSI, PCSI - PSI at Lycée Kléber
Philosophiæ Doctor (Ph.D.) Computer Science Security, Philosophiæ Doctor (Ph.D.) Computer Science Security at Université Grenoble Alpes
The University of Arizona
Engineer's degree Embedded System Design Security, Engineer's degree Embedded System Design Security at Grenoble INP - UGA
English