Summary
Dan Clarke is a Technical Services Developer Engineer with 13 years in IT, EDA and silicon design and over three decades of hands-on ASIC, FPGA and SoC experience from RTL to tape-out. He combines deep domain expertise in VHDL/Verilog, DFT, STA and verification with a strong track record in pre- and post-sales technical support, training and tool integration using Tcl, Perl and Java. Dan has repeatedly bridged product and customer needs—leading on-site evaluations, custom integrations and training for startups and tier-one vendors alike—to improve quality of results and drive successful silicon deliveries. Notably, he has devised memory BIST strategies, clock-tree power optimisations and test pattern generators that materially reduced field defects, showing a practical focus on manufacturability and testability as well as design. Based in the UK, he pairs an M.Sc. in Integrated Circuits System Design with decades of field-proven engineering and customer-facing leadership.
13 years of coding experience
24 years of employment as a software developer
B.Eng. (Hons), Electronics Engineering, First Class Honours, B.Eng. (Hons), Electronics Engineering, First Class Honours at University of Liverpool
M.Sc., Integrated Circuits System Design, M.Sc., Integrated Circuits System Design at UMIST
King Edward's School, Birmingham