Technical Lead - Firmware Engineering at Intel Corporation
Burnaby, British Columbia, Canada
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Summary
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Daniel Apperloo is a firmware engineering leader based in Burnaby, British Columbia, currently serving as Technical Lead for Firmware Engineering at Intel after progressing through SSD firmware roles. He brings a hands-on background from Teradici and early co-op experience, blending low-level firmware development with system design and integration work. With a B.Eng. in Computer Engineering from the University of Victoria, he combines academic grounding with practical experience shipping storage and remote-desktop related firmware. Known for curiosity and dedication, he advances teams through pragmatic technical decisions and mentorship across the firmware lifecycle. Although early in his career arc by years, his rapid progression to a technical lead role reflects strong delivery and domain expertise in storage firmware. He often bridges firmware, tools and automation—skills honed during co-op and professional-services roles that required scripting, integration and cross-stack problem solving.
2 years of coding experience
8 years of employment as a software developer
Bachelor of Engineering (B.Eng.), Computer Engineering, Bachelor of Engineering (B.Eng.), Computer Engineering at University of Victoria
Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.
Contributions:6 reviews, 1 PR, 4 comments in 4 months
bluetooth-lereal-timezephyrsecuregit-repository
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Daniel Apperloo - Technical Lead - Firmware Engineering at Intel Corporation