Summary
Daniel Hullihen is a Senior Member of Technical Staff with nine years of hands-on experience in ASIC design, verification, and architectural modeling, currently focused on design verification and architecture investigations at AMD. He has driven end-to-end verification and RTL development across graphics and ML-accelerated SoCs, authored SystemVerilog/SystemC/C++ testbenches, and led efforts that improved timing by 40% and halved power in prior designs. Comfortable mentoring and managing junior DV engineers, he combines low-level RTL work with higher-level SystemC architectural studies to bridge design and verification. Notably, he has built lab automation and portable C-based test methodologies to accelerate bring-up and characterization, reflecting a practical bias toward deployable, testable solutions. Based in Massachusetts, he pursues continuous learning across the entire design stack from architecture through verification.
9 years of coding experience
8 years of employment as a software developer
Bachelor's Degree, Bachelor's Degree at Worcester Polytechnic Institute
Master's Degree, Master's Degree at Northeastern University
French