Daniel Jeong is a Senior SerDes Engineer with eight years of experience specializing in high-speed SERDES circuits and optical transceivers, currently driving link and PHY development at Ayar Labs from Seoul. He holds a Ph.D. in Electrical Engineering and Computer Science from Seoul National University and transitioned from post-doctoral research into industry, bringing rigorous academic insight to practical, silicon-focused design. Daniel's work bridges cutting-edge optical I/O with system-level integration, emphasizing signal integrity, jitter reduction, and power-efficient SerDes implementations. Known for combining deep device- and circuit-level understanding with hands-on silicon bring-up, he often tackles the messy real-world tradeoffs between performance and manufacturability.
8 years of coding experience
1 year of employment as a software developer
Ph.D., Electrical Engineering and Computer Science, Ph.D., Electrical Engineering and Computer Science at 서울대학교 (Seoul National University)
Contributions:60 commits, 1 PR, 49 pushes in 4 years 10 months
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Daniel Jeong - Senior SerDes Engineer at Ayar Labs