Daniel Lustig
Distinguished Research Scientist at NVIDIA
Boston, Massachusetts, United States
Summary
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Rockstar🎓
Top SchoolDaniel Lustig is a Distinguished Research Scientist at NVIDIA with 11 years of experience specializing in computer architecture and virtual memory systems. He holds a Ph.D. from Princeton and has deep expertise in ISA simulation and MMU behavior, evidenced by substantive contributions to the widely used RISC-V Spike simulator—implementing Svnapot translations, Priv virtual memory updates, and Svinval support. Based in Boston, he blends rigorous academic training with production-driven research to close the gap between architectural ideas and practical simulator implementations. Colleagues rely on him for subtle correctness fixes in low-level memory and encoding logic that materially improve simulator fidelity for emerging RISC-V features.
12 years of coding experience
Bachelor’s Degree, Electrical Engineering, Mathematics, Bachelor’s Degree, Electrical Engineering, Mathematics at University of PennsylvaniaDoctor of Philosophy (Ph.D.), Computer Architecture, Doctor of Philosophy (Ph.D.), Computer Architecture at Princeton University
Github Skills (11)
memory-management10
risc-v10
cpu-architecture10
c-language10
microarchitecture10
cprogramming-language10
computer-architecture10
instruction-set10
assembly8
assembler8
github4
Programming languages (9)
Github contributions (5)
riscv-software-src/riscv-isa-sim
Dec 2020 - Aug 2021
Spike, a RISC-V ISA Simulator
Role in this project:
Backend Developer
Backend DeveloperContributions:1 review, 7 commits, 6 PRs in 8 months
Contributions summary:Daniel contributed to the RISC-V ISA simulator by modifying the Memory Management Unit (MMU) code. Their changes addressed issues related to NAPOT and Svnapot translations, including renaming Zsn to Svnapot and updating the PTE N bit. The user also implemented Priv virtual memory updates and added support for Svinval instructions, further enhancing the simulator's functionality. These updates involved modifying core files like `mmu.cc` and `encoding.h` related to memory access and instruction encoding.
risc-v
daniellustig/daniellustig.github.io
Jan 2016 - Mar 2023
Contributions:15 pushes, 1 branch in 7 years 2 months
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