David Biancolin
Staff Engineer at SiFive
Berkeley, California, United States
Summary
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Rockstar🎓
Top SchoolDavid Biancolin is a Staff Engineer at SiFive with a decade of experience building hardware emulation and FPGA-accelerated simulation flows, translating his Berkeley PhD research into production FireSim deployments for microprocessor IP. He leads a small engineering team in Berkeley focused on fast, cost-effective ASIC emulation and system-level integration, blending hardware design, compiler work, and performance engineering. An active open-source contributor to flagship RISC-V projects (Chisel, FIRRTL, Rocket Chip, Chipyard, FireSim), he’s fixed subtle compiler bugs, expanded aggregate wiring support, and added multi-core and multi-clock simulation capabilities. His background includes redesigning LVDS support at Intel/Altera and deep familiarity with simulation/test automation, making him fluent across FPGA toolchains, hardware-software co-design, and backend compiler pipelines. Notably, he often bridges PhD-tier research and pragmatic engineering—shipping research-quality emulation tooling used by industry teams.
10 years of coding experience
8 years of employment as a software developer
Doctor of Philosophy (Ph.D.), Computer Engineering, Doctor of Philosophy (Ph.D.), Computer Engineering at University of California, BerkeleyBachelor of Applied Science in Engineering Science, Electrical and Computer Engineering, Bachelor of Applied Science in Engineering Science, Electrical and Computer Engineering at University of Toronto
Stackoverflow
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Github Skills (40)
simulation10
hardware-designs10
verilog10
c-language10
performance-analytics10
performance-monitor10
simulate10
simulator10
testing10
simulations10
risc-v10
firrtl10
intermediate-code10
hardware10
performance-measurement10
Programming languages (9)
Github contributions (5)
firesim/firesim
Apr 2016 - Jan 2023
FireSim: Fast and Effortless FPGA-accelerated Hardware Simulation with On-Prem and Cloud Flexibility
Role in this project:
Back-end Developer & Performance Engineer
Back-end Developer & Performance EngineerContributions:7 releases, 712 reviews, 2087 commits in 6 years 9 months
Contributions summary:David appears to have focused on optimizing and extending the FireSim framework's hardware simulation capabilities. Their work includes adding and refining methods to manage and control the execution of the simulator and, improving the performance of the models. Moreover, their contributions incorporate the new support of high-performance, multi-core CPUs to the simulation framework.
risc-vscalablecircuitsacceleratedlattice
ucb-bar/chipyard
May 2019 - Nov 2022
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
Role in this project:Back-end Developer
Back-end DeveloperContributions:76 reviews, 255 commits, 96 PRs in 3 years 6 months
Contributions summary:David primarily contributed to the configuration and testing infrastructure of the Chipyard project. Their work involved modifying target and platform configurations to enable new features and support different hardware setups. The user fixed issues in test suite handling, updated setup scripts for FireSim, and improved the simulation test environment. The user also implemented support for multi-clock designs and made changes to the TracerV bridge.
rtlout-of-orderhardware-designsvlsicomputer-engineering
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