Summary
David Clarino is a Senior Researcher and verification-focused design automation engineer with 13 years of experience specializing in highly configurable UVM environments, build automation, and toolflow development for both classical and emerging quantum circuit design. He has driven verification and automation at companies and universities—building Node.js and Tcl-based CI/regression frameworks, Git-integrated checkin testing, and SunGridEngine load-balanced regression systems tied to clear HTML reporting. His work spans RTL-level verification, SystemVerilog constraint-solvers for randomized configuration generation, and hands-on use of major simulators and tools (Synopsys VCS, Mentor QuestaSim, Cadence Incisiv, Spyglass). Now based in Ibaraki and completing a PhD in computer science at Ritsumeikan, he bridges academic research in quantum circuit toolflows with practical front-end design automation and verification. Colleagues rely on him for pragmatic, reproducible toolchains that turn configurable IP matrices into actionable test results. He’s as comfortable authoring low-level DPI/Tcl build flows as he is exploring verification techniques applicable to quantum toolflows—a combination that makes him effective at translating research ideas into production-ready automation.
13 years of coding experience
13 years of employment as a software developer
B.S, B.A., Electrical Engineering and Computer Science, Physics, B.S, B.A., Electrical Engineering and Computer Science, Physics at University of California, Berkeley
Burbank High School
Master’s Degree, Computer Engineering, Master’s Degree, Computer Engineering at Santa Clara University
Doctor of Philosophy - PhD, Computer Science, Doctor of Philosophy - PhD, Computer Science at Ritsumeikan University
English, Japanese, Tagalog