Summary
David Fang is a seasoned software and hardware engineer with 22 years of experience building CAD/EDA tools and developer productivity infrastructure for ASIC and VLSI workflows. Currently at Google, he supports chip development with tooling and verification infrastructure and is a contributor to Verible, a notable open-source SystemVerilog toolset. Previously a principal engineer at Achronix, he designed, verified, and debugged both asynchronous (self-timed) and synchronous circuits while authoring compilers, simulators, and checkers. He holds a PhD in Electrical and Computer Engineering from Cornell and brings an uncommon blend of hands-on silicon methodology and software craftsmanship. Known for firefighting complex hardware-software integration problems, he thrives on turning research-grade circuit concepts into reliable, production-grade tooling.
22 years of coding experience
8 years of employment as a software developer
BS, Electrical Engineering, BS, Electrical Engineering at California Institute of Technology
MS, ECE, MS, ECE at Cornell University
High School, High School at Franklin Regional Sr. HS
Chinese, German, c++