David Hendricks
Independent Consultant at Self
Saratoga, California, United States
Summary
👤
Senior🎓
Top SchoolDavid Hendricks is an independent consultant and embedded systems engineer with 22 years of experience building firmware and systems software that bridge hardware and software across datacenter, consumer, and manufacturing environments. He has led BIOS and firmware efforts for large-scale cloud providers (notably AWS EC2 AMD Milan platforms) and driven open firmware initiatives at Facebook and Google, bringing production rigor to open-source projects like coreboot and flashrom. David specializes in low-level C development, hardware initialization, firmware update pipelines, and obscure debug/troubleshooting, and he routinely helps OEMs/ODMs optimize manufacturing and flash workflows. A long-time coreboot contributor and leader, he has added memory and platform support, UART and PCIe enhancements, and new device drivers—work that surfaces in widely used projects underpinning modern open firmware. Based in Saratoga, CA, he combines hands-on bring-up experience with a knack for translating vendor-specific silicon quirks into robust, reproducible firmware and validation policies.
22 years of coding experience
18 years of employment as a software developer
BS Computer Engineering, BS Computer Engineering at The University of New Mexico
English
Github Skills (14)
c1710
firmware10
embedded10
flash-memory10
sys10
c1110
interfacing10
hardware-interface10
devtools9
software-update9
updater9
acpi8
uart7
pcie7
Programming languages (6)
Github contributions (5)
coreboot/coreboot
Jan 2004 - May 2022
Read-only mirror of https://review.coreboot.org/coreboot.git. We don't handle Pull Requests.
Role in this project:
Embedded Systems Engineer / IoT Developer
Embedded Systems Engineer / IoT DeveloperContributions:372 commits in 18 years 7 months
Contributions summary:David primarily contributed to low-level firmware development within the coreboot project, specifically focusing on platform initialization and hardware-specific configurations. They added support for new Micron and Hynix SDRAM modules, including related timing and configuration settings. Further contributions included enhancements to the PL011 UART driver and additions of functionalities such as a configurable PCIe completion timeout, and the addition of a new OCP platform.
corebootfirmwarereviewpull-requestsbootloader
flashrom/flashrom
Mar 2004 - Aug 2020
Send patches to https://review.coreboot.org: https://www.flashrom.org/Development_Guidelines#GitHub
Role in this project:Embedded Systems Engineer / IoT Developer
Embedded Systems Engineer / IoT DeveloperContributions:30 commits, 12 PRs, 126 comments in 16 years 7 months
Contributions summary:David's primary contribution involves adding support for various SST (Silicon Storage Technology) flash memory chips to the flashrom repository. The user implemented drivers for different flash memory models, including the SST49LF040 and other SST49LF0xxA series parts, enabling read, erase, and write operations. The commits demonstrate expertise in understanding the specific memory access commands and procedures for these chips, as well as integrating them within the flashrom framework. These changes include modifications to existing flash definitions and the addition of new device-specific code.
github-guidelinesfirmware-updatecorebootdevelopment-guidelinesreview
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