Diana Picus is a compiler engineer with a decade of experience specializing in LLVM backends, currently driving AMDGPU support at AMD from Stockholm. She has a strong track record at Linaro and Freescale working on ARM/AArch64 toolchains, GlobalISel, Flang, LLDB for CHERI hardware, and upstream CI/buildbot maintenance. Her open-source contributions include implementing AMDGPU-specific instructions and dynamic VGPR stack allocation in the widely used llvm-project, as well as targeted Clang and ARM backend fixes in mirrored repos. Comfortable in both research and production contexts, she pairs deep low-level expertise with hands-on build and release responsibilities. Colleagues rely on her for subtle, architecture-specific fixes that improve correctness and portability across diverse targets.
10 years of coding experience
10 years of employment as a software developer
Colegiul National "Petru Rares" Piatra Neamt
Bachelor of Science (B.Sc.), Computer Engineering, Bachelor of Science (B.Sc.), Computer Engineering at Universitatea „Politehnica” din București
The LLVM Project is a collection of modular and reusable compiler and toolchain technologies.
Role in this project:
Back-end Developer (focus on compiler infrastructure)
Contributions:67 reviews, 2 commits, 52 PRs in 6 days
Contributions summary:Diana contributed to the LLVM compiler project, primarily focusing on the AMDGPU backend. Their work involved implementing and refining specific instructions, such as `llvm.amdgcn.init.whole.wave` and `S_ALLOC_VGPR`. The user also made modifications to the frame lowering process, including the allocation of stack space for dynamic VGPRs in compute shaders with CWSR (compute queue). Furthermore, the user made improvements related to the documentation for the IRTranslator.
Contributions summary:Diana primarily contributed to the ARM backend of the LLVM project. Their work involved fixing issues related to instruction selection within the GlobalISel framework, specifically for the ARM architecture. They added and refined support for various ARM-specific instructions, including G_GLOBAL_VALUE, G_FDIV, and G_FMUL, as well as shift operations. They also focused on enabling PIC mode support for the ARM target, ensuring compatibility across different relocation models.
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