Diego Rosales
ASIC & FPGA Developer at Ericsson
Mexico
Summary
👤
Senior🎓
Top SchoolDiego Rosales is an ASIC and FPGA developer with 12 years of experience designing RTL and deploying ASIC emulation on FPGA platforms. He has driven FPGA emulation and prototyping efforts at Ericsson and Intel, translating complex silicon designs into reliable, testable hardware. A Cum Laude Electronics and Communications engineer from Fundación Universidad de las Américas Puebla, Diego blends rigorous academic training with hands-on systems debugging and hardware-software integration. He’s comfortable across the full RTL-to-emulation flow, from verification harnesses to performance tuning for large-scale emulation rigs. Based in Mexico, he brings a pragmatic, detail-oriented approach honed by both industry-grade projects and makerspace electronics design. An under-the-radar strength is his practical experience turning prototype concepts into production-ready validation environments.
12 years of coding experience
5 years of employment as a software developer
Bachillerato, Ingeniería, Bachillerato, Ingeniería at Woodcock British SchoolLicenciatura en Ingeniería en Electrónica y Comunicaciones, Ingeniería en electrónica y de comunicaciones, Cum Laude, Licenciatura en Ingeniería en Electrónica y Comunicaciones, Ingeniería en electrónica y de comunicaciones, Cum Laude at Fundación Universidad de las Américas, Puebla, A.C.
Spanish, English
Github Skills (27)
synthesis9
yosys9
php8
verification8
verilog8
uvm8
javascript7
vhdl7
python7
owncloud6
nextcloud6
collaboration6
docker6
usability5
federation5
Programming languages (5)
Github contributions (5)
DiegoRosales/Zybo_Sampler
Nov 2016 - Dec 2021
Contributions:411 commits, 82 pushes, 3 branches in 5 years 2 months
DiegoRosales/Audio-Encryption
Nov 2014 - Jan 2016
Contributions:11 commits, 4 pushes in 1 year 2 months
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