Divyesh Parmar
CPU Cores Sr. Silicon Design Engineer at AMD
California, United States
Summary
👤
Senior🎓
Top SchoolDivyesh Parmar is a CPU cores senior silicon design engineer with 8 years of experience specializing in physical design and computer architecture, currently driving core design at AMD. He has end-to-end RTL-to-GDS expertise across memories and ALU units, practical tape-out experience on 7nm/22nm/32nm nodes, and strong backend skills in synthesis, timing, and constraint development. Equally comfortable on the front end, he’s designed pipelined architectures for image processing and CPU subsystems and is fluent with industry tools like Cadence, Synopsys, Mentor, and ModelSim. His academic research at Arizona State led a team studying alternate interconnect materials for sub-5nm nodes, reflecting a blend of hands-on implementation and forward-looking materials-level insight. He also experiments with system design patterns and cloud-native tooling in personal projects, bridging silicon design rigor with software-oriented automation.
8 years of coding experience
2 years of employment as a software developer
Diploma Electronics and Communications Engineering, Diploma Electronics and Communications Engineering at Sardar Vallabhbhai Patel PolytechnicMaster of Science Computer Engineering, Master of Science Computer Engineering at Arizona State UniversityBachelor’s Degree Electronics and Telecommunication, Bachelor’s Degree Electronics and Telecommunication at Dwarkadas J. Sanghvi College of Engineering
Stackoverflow
351reputation
67kreached
11answers
14questions
Github Skills (161)
chartjs-plugin10
electron10
typescript10
editor9
javascript9
js-plugin9
linux9
api9
js9
material-ui9
windows9
visual-studio9
microsoft9
visual-studio-code9
react9
Programming languages (10)
Github contributions (5)
Tapudp/Skyscanner
Nov 2019 - Dec 2020
Contributions:1 PR, 2 pushes, 1 branch in 1 year 1 month
Tapudp/blogrr
Aug 2018 - Dec 2019
Contributions:3 pushes, 2 branches in 1 year 3 months
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