Dmitri Vlasov

Verification Engineer

Novi Sad, Vojvodina, Serbia
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Summary

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Dmitri Vlasov is a verification engineer and compiler builder with eight years of industry experience and a deep academic background (PhD in algebra and mathematical logic). He develops and verifies FPGA projects using Verilog/SystemVerilog, while also creating functional language tooling and runtime systems informed by prior work on an LLVM-based PHP compiler. Dmitri blends formal methods and practical engineering—proving correctness where possible and increasingly leveraging AI to accelerate both verification and compiler development. His career spans research at the Sobolev Institute through high-load systems at RhythmOne and production compiler/runtime work at Parallels, reflecting comfort across theory and large-scale engineering. Based in Novi Sad, Serbia, he is notable for pairing rigorous mathematical training with hands-on system design, including memory managers, garbage collectors, and associative container algorithms.
code8 years of coding experience
job18 years of employment as a software developer
bookDoctor of Philosophy (Ph.D.), Algebra and mathematical logic, Doctor of Philosophy (Ph.D.), Algebra and mathematical logic at Sobolev Institute of Mathematics
bookMaster of Science (MS), mathematics, logic, 4.97, Master of Science (MS), mathematics, logic, 4.97 at Novosibirsk State University (NSU)
book130
languagesEnglish
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Stackoverflow

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Github contributions (5)

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Dmitriy0111/nanoFOX

Nov 2018 - Aug 2019

Contributions:160 commits, 158 pushes, 16 branches in 9 months
Dmitriy0111/vcv_sv

Jun 2019 - Jun 2022

Contributions:26 commits, 16 pushes in 3 years
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Dmitri Vlasov - Verification Engineer