Dongik Jeon
Staff Engineer at Samsung Electronics
Seoul, South Korea
Summary
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Senior🎓
Top SchoolDongik Jeon is a Staff Engineer at Samsung Electronics with 10 years of experience specializing in SSD controller architecture, SoC RTL design, and accelerator IPs for enterprise/datacenter storage. Pursuing a Ph.D. in Electronics and Computer Engineering at Hanyang University and part of the ESoC lab, he blends academic research in PIM, HMC, and DRAM controllers with hands-on RTL work using Verilog and Synopsys toolchains. At Samsung he designs multi-tenant QoS scheduling, buffer management, and FTL accelerator IPs that optimize performance and resource isolation in high-throughput environments. He also develops C++-based system simulators—maintaining an open-source HMC simulator (CasHMC)—demonstrating a practical bridge between architectural simulation and silicon-targeted implementation. Based in Seoul, he brings a rare combination of deep memory-system research and production-grade RTL engineering.
10 years of coding experience
Doctor of Philosophy - PhD, Electronics and Computer Engineering, Doctor of Philosophy - PhD, Electronics and Computer Engineering at Hanyang University
Github Skills (6)
cycle9
crossword9
simulation8
simulator8
cube7
hybrid4
Programming languages (1)
Github contributions (5)
estwings57/CasHMC_temp
May 2016 - Jul 2016
Contributions:1 release, 30 pushes, 5 branches in 2 months
estwings57/temp
Jul 2016 - Jul 2016
Contributions:1 release, 3 pushes, 2 branches in 1 day
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