Dushyant Juneja is a Senior Mixed Signal Design Verification Engineer with over a decade at Analog Devices, specializing in verifying analog-digital interfaces for large-scale communication SoCs and performing transistor-level static and dynamic checks. He combines deep hands-on AMS verification with tooling and automation skills—authoring analog checkers for SystemVerilog testbenches and scripting in SKILL/Lisp, Python, and JavaScript—to accelerate design closure and simulation workflows. As an internal trainer and documentation creator, he champions adoption of cutting-edge mixed-signal simulation techniques across global design teams and provides ESD/EM consultation for full-chip issues. An avid learner and session lead in web frontend development, he’s increasingly exploring practical AI applications to enhance mixed-signal verification, blending domain expertise with software-driven productivity improvements.
10 years of coding experience
8 years of employment as a software developer
SICA School
Bachelor of Technology (B.Tech.), Electrical and Electronics Engineering, Bachelor of Technology (B.Tech.), Electrical and Electronics Engineering at Indian Institute of Technology (Banaras Hindu University), Varanasi
Master of Technology (M.Tech.), Instrumentation, 10.0, Master of Technology (M.Tech.), Instrumentation, 10.0 at IIT Kharagpur
Capstone project Travel App for Udacity’s Frontend Nanodegree Program
Contributions:22 PRs, 74 pushes, 29 branches in 2 years 7 months
capstonereactnanodegreetravel-appudacity
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