Eddy Lin
ASIC Interface Storage Architect at Google
Richmond, British Columbia, Canada
Summary
🤩
Rockstar🎓
Top SchoolEddy Lin is an ASIC interface and storage architect with 7 years of hands-on experience designing and validating multi-million gate NVMe/PCIe systems, currently driving storage interface architecture at Google. He led one of the first PCIe Gen4 NVMe subsystem releases, established an in-house PCIe compliance program, and has deep expertise in Gen3/4 electrical transceiver tuning, CTLE/DFE equalization, and PHY validation. Eddy blends frontend RTL design with backend synthesis, STA, DFT and FPGA emulation to deliver production-ready silicon and overseen complex bring-ups and interoperability across hosts and devices. Known for pragmatic debugging and measurement skills, he routinely uses high-speed scopes, BERT, VNAs, and protocol exercisers to resolve corner-case failures. A Duke ’22 alum and Richmond, BC–based engineer, he pairs rigorous protocol knowledge with cross-functional leadership to move designs from spec to certified product.
7 years of coding experience
11 years of employment as a software developer
Bachelor of Applied Science (BASc), Electrical and Electronics Engineering, Bachelor of Applied Science (BASc), Electrical and Electronics Engineering at The University of British ColumbiaMaster of Applied Science, Electrical and Electronics Engineering, Master of Applied Science, Electrical and Electronics Engineering at Simon Fraser University
Github Skills (42)
monitoring10
observability10
go-api10
distributed-tracing10
collector10
api10
sdk10
opentelemetry10
logging10
cgo10
tempo10
telemetry10
otel10
javascript9
python9
Programming languages (7)
Github contributions (5)
qiyaoliang/Quantum-Deep-Learning
Jun 2020 - Dec 2020
Contributions:98 commits, 29 pushes in 5 months
ericdjiang/CrashDetector
Nov 2018 - May 2021
Contributions:8 PRs, 36 pushes, 1 branch in 2 years 6 months
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