Eyck Jentzsch
General Manager at MINRES Technologies GmbH
Munich, Bavaria, Germany
Summary
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Senior🎓
Top SchoolEyck Jentzsch is a seasoned engineering leader and General Manager with over two decades of experience delivering ESL and functional verification solutions for digital and mixed-signal ICs and SoCs. He combines hands-on expertise in architecting verification platforms and enterprise IT with a strong track record of managing outsourcing and complex HW/SW co-design projects. Eyck led advanced application and research teams at Cadence, coordinated public-funded research through VLAB, and has run MINRES Technologies since 2012, demonstrating continuity from R&D to commercial execution. His five years of research into semantic descriptions of design systems and processes informs a pragmatic approach to project management tools and performance evaluation. Based in Munich, he pairs deep technical roots in electronics design automation with practical product and services leadership. Colleagues value him for bridging rigorous verification methodology with scalable operational delivery.
14 years of coding experience
23 years of employment as a software developer
Post Graduate, electronics design automation, Post Graduate, electronics design automation at Technische Universität Ilmenau
German, English
Stackoverflow
36reputation
710reached
3answers
0questions
Github Skills (98)
verilog10
cpp10
network-tools10
altium-designer10
xtext10
instruction-set10
systemverilog10
llvm10
risc-v10
implant10
systemc10
verilator10
c-plusplus10
whois10
protocols10
Programming languages (14)
Github contributions (5)
VP-Vibes/TGC-VP
Nov 2022 - Aug 2025
The Scale4Edge ecosystem VP
Contributions:2 PRs, 1637 pushes, 143 branches in 2 years 8 months
5gpostersecuritydockerkubernetes
Minres/SCViewer
Sep 2022 - Feb 2023
Online documentation can be found at https://minres.github.io/SCViewer/
Contributions:10 releases, 27 commits, 56 pushes in 4 months
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