Summary
Fahad Ausaf is a Principal CPU Architect based in Cambridge with nine years of experience blending academic research and industry leadership across CPU architecture, compiler toolchains, and formal verification. He leads ISA verification and CPU modelling efforts at Huawei after directing ASL compiler and security research at Arm, with deep hands-on expertise in static analysis, SMT/SAT-based test generation, fuzzing, and directed-random instruction generation. His PhD work at King’s College London on regular-expression parsing, POSIX parsing and formal compiler verification underpins a rare combination of theory-driven approaches applied to practical CPU and compiler problems. Fahad has also contributed to protocol parser and verified-runtime research during a Microsoft research placement, reflecting an ability to move between high-assurance proofs and production tooling. He is notable for building automated unit-test generation tools from static analysis and solver integration—demonstrating both systems-level impact and formal-methods rigor. Based in the UK, he brings an investigator’s mindset to security-sensitive compiler and ISA challenges, preferring provable correctness alongside pragmatic engineering.
9 years of coding experience
9 years of employment as a software developer
Master's degree, Advanced Computing, Master's degree, Advanced Computing at King's College London
Bachelor's degree, Computer Science, Bachelor's degree, Computer Science at Iqra University (Official)