Farshid Varno is a Senior Staff Engineer based in San Francisco with over 8 years of industry experience and a 15-year background combining academic research and hands-on hardware design. He specializes in AI-hardware co-design, developing custom AI kernels, non-linear approximators, and FPGA-based telecommunication modules while optimizing hardware-software integration for high-performance AI systems. His research has driven state-of-the-art Federated and Transfer Learning methods, resulted in a filed patent, and produced practical tooling like the FedSim federated learning simulator. At companies from Imagia to Rain and now d-Matrix he has bridged R&D and production, shipping kernel-level improvements and accelerator innovations. Farshid pairs deep FPGA/VHDL expertise (TDM switches, AES modules, Cyclone/Virtex platforms) with modern ML deployment experience across edge and distributed settings. He is passionate about leading technical teams that translate cutting-edge research into deployable AI-hardware solutions.
8 years of coding experience
9 years of employment as a software developer
DLRL Summer School, DLRL Summer School at Mila - Quebec Artificial Intelligence Institute
Doctor of Philosophy - PhD Computer Science, Doctor of Philosophy - PhD Computer Science at Dalhousie University
1st class Master of Science (MSc) Computer Architecture, 1st class Master of Science (MSc) Computer Architecture at University of Isfahan
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