Filip Kokosiński

Software Engineer II at Antmicro

Greater Poland Voivodeship
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Summary

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Rockstar
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Top School
Filip Kokosiński is a Software Engineer II with a decade of experience building embedded systems, FPGA-based SoCs, and low-level platform support, currently maintaining the Zephyr RISC-V and vendor ports at Antmicro. He is an active upstream contributor to high-profile projects like Zephyr, the Linux kernel, LiteX and pip, having authored over 100 Zephyr PRs and delivered device drivers, BLE integrations, and RISC-V fixes. Filip blends hardware and software expertise—FPGA design and scripting, devicetree-driven board support, and retargeting GCC for new CPUs—making him effective across simulation, drivers, and OS ports. Based in Greater Poland, he has a track record of adapting memory maps and optimizing low-level interfaces (e.g., QPI and SPI) for diverse boards and SoCs, and he mentors interns while presenting his work externally.
code9 years of coding experience
job3 years of employment as a software developer
bookMagister inżynier (Mgr inż.) Informatyka, Magister inżynier (Mgr inż.) Informatyka at Poznan University of Technology
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Github Skills (28)

risc-v10
embedded-language10
memory-management10
zephyr-rtos10
bluetooth-le10
c1110
microcontroller10
hardware10
c1710
device-tree10
sys10
bluetooth10
fpga10
embedded10
system-on-chip10

Programming languages (10)

JavaSystemVerilogShellC++CCoqVerilogRobotFramework

Github contributions (5)

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zephyrproject-rtos/zephyr

May 2019 - Mar 2025

Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.
Role in this project:
userEmbedded Systems Engineer / IoT Developer
Contributions:1201 reviews, 103 PRs, 960 comments in 5 years 11 months
Contributions summary:Filip primarily contributed to the Zephyr RTOS project by adding and modifying device tree files for various hardware platforms, especially focusing on SiLabs and Microchip SoCs and boards. They implemented BLE support for the EFR32xG24 family and added a SiLabs Bluetooth HCI driver. The user also worked on release notes, documentation updates, and bug fixes, demonstrating a deep understanding of the project's structure and supported hardware.
bluetooth-lereal-timezephyrsecuregit-repository
enjoy-digital/litex

Sep 2019 - Aug 2021

Build your hardware, easily!
Role in this project:
userEmbedded Systems Engineer / IoT Developer
Contributions:5 commits, 3 PRs in 1 year 11 months
Contributions summary:Filip primarily focused on modifying the LiteX project, which appears to be a framework for building hardware. They made changes related to increasing ROM sizes and adapting memory maps for various hardware platforms, including KC705, Nexys Video, Genesys2, and others, specifically when using EthernetSoC. Furthermore, they modified the software library to integrate QPI mode and enhance memory speed benchmarks, demonstrating familiarity with low-level hardware interactions.
vhdlsystem-on-chipedasochardware
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