Forrest Zhao
Cloud Systems Architect at Intel Corporation
Dongcheng District, Beijing, China
Summary
👤
Senior🎓
Top SchoolForrest Zhao is a Cloud Systems Architect with 26 years of experience designing high-performance interconnects, FPGA/ASIC architectures, and datacenter memory disaggregation solutions. At Intel he led microarchitecture and RTL design for FPGA-based CXL memory expansion, a CXL multi-headed pooling controller, and rack-scale 100GbE NICs, while also delivering TCP offload, HTTP/2 and RDMA-over-UDP innovations that improved throughput and congestion resilience. His background spans FPGA product FAE roles driving telecom and hyperscale wins, low-level packet/forwarding engine development at Huawei, and hands-on platform work from CPLDs to ARM BMC integrations. Forrest combines deep hardware design skills with systems-level networking and software (gRPC, Protobuf) expertise, and frequently collaborates with Tier 1 customers on co-designed proofs-of-concept. Based in Beijing, he pairs academic training in electrical engineering with a rare blend of silicon, firmware, and datacenter systems experience that accelerates adoption of emerging fabrics like CXL.
26 years of coding experience
20 years of employment as a software developer
Master's degree, Electrical Engineering, Master's degree, Electrical Engineering at Xi'an Jiaotong UniversityBachelor's degree, Electrical Engineering, Bachelor's degree, Electrical Engineering at Wuhan University of Technology
English, Chinese
Github Skills (25)
bluez10
governance8
dapr7
mongodb6
pacemaker6
blob-storage6
sink6
cosmosdb6
moto5
redis5
kafka4
partitioning4
scale3
resource-manager3
scalable3
Programming languages (2)
Github contributions (5)
bulislaw/obexd-map
Nov 2008 - Jan 2010
Contributions:28 commits in 1 year 2 months
quanganh2627/android_device_intel_baytrail
Mar 2013 - Apr 2014
Contributions:7 commits in 1 year 1 month
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