Summary
Frederico Möller is a pragmatic engineering leader with 11 years of experience in digital and mixed-signal verification, currently managing Digital Verification at Monolithic Power Systems in Barcelona. He combines deep hands-on expertise in UVM, SystemC, Verilog/Verilog-AMS and embedded C/C++ with FPGA and system modeling skills applied to safety-critical DO-254 projects. His background spans RF/SOC and RFID mixed-signal stacks, leading verification teams and building AMS testbenches that bridge analog behavior and digital verification flows. A former army cadet and mechatronics-trained engineer now pursuing advanced CS studies, he brings disciplined project leadership and a systems-thinking approach to complex verification challenges. Notably, he has consistently moved between hands-on verification and team leadership roles, ensuring technical rigor while scaling processes across international semiconductor programs.
11 years of coding experience
16 years of employment as a software developer
Graduated Computer Engineering, Graduated Computer Engineering at Federal University of Rio Grande do Sul
Telecommunications, Telecommunications at ENSICAEN - Ecole Nationale Supérieure d'Ingénieurs de Caen
English, French, Spanish