Summary
G Chen is a seasoned engineering program leader with over two decades of experience delivering more than 30 large-scale technical programs spanning wireless networks, consumer electronics, and semiconductor systems. Based in Beijing and currently consulting across the semiconductor and AI-enabled HPC ecosystem, he brings deep domain expertise in chiplet integration, advanced process nodes, 2D/3D packaging and EDA/fab supply chains. At Intel he led global multi-team pre- and post-silicon integration for 4nm–2nm multi-chiplet platforms, improving multi-die emulation runtimes by 30% and meeting aggressive RTL milestone KPIs. His earlier career built high-volume mobile and wireless products at Nokia and Lucent, including first-in-market demos for 5G and NB-IoT and multiple product lines commercialized via ODM partners. Known for translating complex cross-functional technical challenges into producible systems, he also has a knack for cost-saving architecture—evidenced by an autonomous-driving ECU consolidation that eliminated 15 MCUs and reduced BOM. Recently expanding into information security governance, he couples hands-on hardware and system-level insight with strategic program execution for cutting-edge semiconductor and AI applications.
11 years of coding experience
19 years of employment as a software developer
Certificate of Information Security Analyst Information Security Governance Risk and Compliance Analyst Program, Certificate of Information Security Analyst Information Security Governance Risk and Compliance Analyst Program at University of South Florida
MSEE Railroad Telecommunications and Control, MSEE Railroad Telecommunications and Control at Lanzhou Jiaotong University