Gabriele Castellano
Senior Research Engineer at Huawei
Paris, Ile-de-France
Summary
👤
Senior🎓
Top SchoolGabriele Castellano is a Senior Research Engineer with a decade of experience specializing in latency-aware orchestration and scheduling for cloud and multi-provider edge computing. He holds a PhD and MSc from Politecnico di Torino and has combined academic rigor with industry impact through roles at Nokia Bell Labs, Inria, Telefonica, and currently Huawei. His work blends distributed algorithms and practical prototypes for real-time ML inference and dynamic resource partitioning, developed during a visiting stint in the US and an industrial internship in Spain. Known for translating theoretical models into deployable systems, he focuses on multi-provider orchestration challenges that few practitioners tackle end-to-end. Based in Paris, he brings strong academic honors and a track record of cross-border collaborations that accelerate low-latency edge services.
10 years of coding experience
2 years of employment as a software developer
Bachelor's degree, Computer Engineering, 110/110 cum laude, Bachelor's degree, Computer Engineering, 110/110 cum laude at Università di CataniaDiploma di Liceo Scientifico, Liceo Scientifico, 100 / 100, Diploma di Liceo Scientifico, Liceo Scientifico, 100 / 100 at I.I.S.S Ettore Majorana TroinaDoctor of Philosophy - PhD, Computer Engineering, Doctor of Philosophy - PhD, Computer Engineering at Politecnico di Torino
Italian, English, Spanish, French
Stackoverflow
21reputation
170reached
1answer
1question
Github Skills (100)
tabletop10
rust10
javascript9
rust-lang9
compiler9
sklearn9
react-native9
multiplayer9
standard-library9
react9
shell8
powershell8
linux8
game-engine8
rust-language8
Programming languages (8)
Github contributions (5)
netgroup-polito/onos-applications
Aug 2016 - Jul 2017
Contributions:69 commits, 53 pushes, 3 branches in 11 months
onostesting
netgroup-polito/frog4-orchestrator
Mar 2016 - Nov 2017
Contributions:1 release, 45 pushes, 4 branches in 1 year 8 months
orchestratorsubmodule
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