Galina Bar is a Senior System Engineer based in Haifa with over eight years of experience building complex hardware and system-level solutions, currently contributing at Intel. Her background spans ASIC and FPGA design, VHDL/Verilog RTL development, synthesis, place-and-route, and system verification across roles at Nokia Siemens Networks, Verisense, and Terachip. She pairs a rare combination of life-sciences training (M.Sc. in physiology/pharmacology and biology studies at Weizmann) with formal electronics education, informing a pragmatic, multidisciplinary approach to engineering problems. Galina also programs in computer vision and data science, bringing algorithmic insight to hardware-software integration. Known for owning designs end-to-end—from architecture and specifications to gate-level verification—she’s comfortable translating complex requirements into reliable, production-ready systems.
8 years of coding experience
3 years of employment as a software developer
M.Sc, physiology, pharmacology, M.Sc, physiology, pharmacology at Tel Aviv University
Contributions:1 review, 2 PRs, 205 pushes in 4 years 6 months
optimizationoptimization-toolsmachine-learning
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