Giacomo Travaglini
Principal Software Engineer at Arm
Cambridge, England, United Kingdom
Summary
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Rockstar🎓
Top School
Top expert inDigital Hardware Design and Verification
Giacomo Travaglini is a Principal Software Engineer with 11 years of experience specializing in computer-system architecture and simulator development, currently based in Cambridge and working at Arm. He has advanced through multiple senior roles at Arm, driving backend and systems engineering for the gem5 full-system simulator and implementing and optimizing Arm architecture features such as SVE, MSC instructions, and processor authentication. His work blends deep C++ and Python systems programming with rigorous test-case development and code hygiene to make complex architecture models both accurate and maintainable. Before Arm he developed microprocessor software models at Imagination Technologies and researched CMOS imagers during industry internships, reflecting a hardware-aware software mindset. An active contributor to the widely used gem5 project, he balances research-grade rigor with production-facing engineering to influence both simulation fidelity and developer usability.
10 years of coding experience
6 years of employment as a software developer
Master of Science (MSc) Electronic Engineering - Digital Microelectronics, Master of Science (MSc) Electronic Engineering - Digital Microelectronics at Sapienza Università di Roma
Italian, English, Spanish
Stackoverflow
11reputation
954reached
2answers
1question
Github Skills (21)
simulation10
assembly10
simulate10
simulator10
computer-architecture10
simulations10
risc-v10
vector10
sve10
assemble10
assembler10
scalable10
c-language9
cprogramming-language9
ptrace6
Programming languages (4)
Github contributions (5)
gem5/gem5
Sep 2017 - Jan 2023
The official repository for the gem5 computer-system architecture simulator.
Role in this project:
Back-end Developer & Systems Engineer
Back-end Developer & Systems EngineerContributions:307 reviews, 938 commits, 196 PRs in 5 years 4 months
Contributions summary:Giacomo significantly contributed to the gem5 computer-system architecture simulator by implementing and enhancing the Arm architecture support. This included implementing and optimizing specific instructions, like those related to Memory System Component (MSC) and Processor authentication as well as integrating the features of the Scalable Vector Extension (SVE) and the FGT feature. The user's work involved creating dedicated test cases, improving the code, and making it more readable.
storedsimulationupstreamsimulatorgem5-simulator
giactra/new-website
Feb 2020 - Nov 2023
New gem5 website
Contributions:8 pushes, 3 branches in 3 years 9 months
gem5
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