Girisha Dengi
FPGA Firmware Senior Engineer at Intel Corporation
Bengaluru, Karnataka, India
Summary
🤩
Rockstar🎓
Top SchoolGirisha Dengi is an FPGA firmware senior engineer with a focused two-year tenure at Intel and over a decade of embedded systems experience across startups and enterprises. He specializes in ARMv8 secure/non-secure boot flows, pre- and post-silicon firmware bring-up, and low-level driver/BSP development for Cortex-A/M and RISC-V platforms. His work spans secure boot from SD, QSPI and NAND, contributions to ARM Trusted Firmware and Zephyr RTOS, and a notable Zephyr contribution that added clock control and PSCI/reset support for Intel Agilex5. He has deep IoT expertise—designing low-power NB-IoT/CAT-M modem drivers, OTA eUICC provisioning, and battery-optimization algorithms for field devices. Comfortable in both simulation/emulation and production silicon environments, he combines hardware-aware firmware engineering with active open-source collaboration. Based in Bengaluru, he brings pragmatic system-level thinking and a track record of turning silicon constraints into reliable firmware solutions.
2 years of coding experience
12 years of employment as a software developer
B.E, Electronics and Communication, First Class with Distinction, B.E, Electronics and Communication, First Class with Distinction at Visvesvaraya Technological University
Github Skills (13)
c1710
embedded-language10
clock10
device-tree10
rtos10
driver10
c1110
microcontroller10
zephyr10
ps9
arm9
embedded9
iot8
Programming languages (1)
Github contributions (2)
zephyrproject-rtos/zephyr
Jul 2023 - Nov 2024
Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.
Role in this project:
Embedded Systems Engineer / IoT Developer
Embedded Systems Engineer / IoT DeveloperContributions:28 reviews, 4 PRs, 44 comments in 1 year 5 months
Contributions summary:Girisha primarily contributed to the Zephyr RTOS project by developing a clock driver for the Intel Agilex5 platform. Their work involved implementing low-level clock control functions, including initialization, frequency calculation, and accessing hardware registers. The user also added device tree descriptions and updated existing ones, indicating a focus on hardware integration and platform-specific configurations. Furthermore, they added support for multiple PSCI versions and added reset control for the Intel Agilex5 platform.
bluetooth-lereal-timezephyrsecuregit-repository
gdengi/zephyr
Jul 2023 - Sep 2024
Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.
Contributions:26 pushes, 4 branches in 1 year 2 months
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