Grant Miner
ASIC Design Engineer at TetraMem - Accelerate The World
San Francisco Bay Area United States
Summary
🤩
Rockstar🎓
Top SchoolGrant Miner is a Senior SoC Design Engineer with 12 years of hands-on experience building mixed-signal ASICs and SoC features, now leading SoC design at TetraMem. He progressed from IC design intern to senior engineer by owning tapeout-ready interfaces, creating high-fidelity digital models of analog circuits, and automating waveform generation that saved hundreds of testbench hours. His background spans satellite communications, phased-array research, and vacuum-rated propulsion instrumentation—bringing uncommon cross-domain expertise in RF, firmware, and hardware systems. He teaches and mentors in computer architecture and communications, translating classroom concepts into production-ready silicon. Grant combines practical chip design rigor with system-level thinking, often surfacing firmware and tooling improvements that accelerate hardware bring-up. Based in the United States, he pairs an ECE degree from Olin with international coursework in political science, reflecting a broader curiosity about technology and policy.
12 years of coding experience
2 years of employment as a software developer
Bachelor of Science - BS, Electrical and Computer Engineering, Bachelor of Science - BS, Electrical and Computer Engineering at Franklin W. Olin College of EngineeringVisiting Student, Political Science, Visiting Student, Political Science at University of Amsterdam
Github Skills (200)
http-client10
bluebird10
middleware10
browser10
geocoding10
fleet10
nodejs10
orm10
xmlhttprequest10
expressjs10
windows10
expressive10
ajax10
mysql10
spring-boot10
Programming languages (9)
Github contributions (5)
gx0r/koa-brute
Jun 2015 - Mar 2022
Contributions:21 pushes, 1 branch, 3 tags in 6 years 9 months
gx0r/brute-rethinkdb
May 2015 - Mar 2022
Contributions:1 PR, 14 pushes, 1 branch in 6 years 10 months
rethinkdbexpressnodejsbruteexpress-brute
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