Guanwen Zhong is a Senior Staff Research Engineer based in Singapore with a PhD in Computer Science and over a decade of experience designing FPGA-based system-level solutions for networking and compute acceleration in data centers. He has led and implemented scalable, usability-focused FPGA architectures at Xilinx and AMD, and previously built hardware/software co-design platforms at NUS that delivered order-of-magnitude speedups for deep learning workloads. His work spans production-facing research and hands-on prototyping—from ADAS multi-target tracking and LLVM-based profiling tools to push-button FPGA solutions for popular ML frameworks. Comfortable bridging academia and industry, he recruits and mentors interns for FPGA networking research, demonstrating both technical depth and a talent for translating research into deployable systems.
10 years of coding experience
6 years of employment as a software developer
Bachelor's Degree, Microelectronics in School of Physics and Engineering, Bachelor's Degree, Microelectronics in School of Physics and Engineering at Sun Yat-Sen University
Ph.D, Computer Science, Ph.D, Computer Science at National University of Singapore / NUS
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Guanwen Zhong - Senior Staff Research Engineer at AMD