Hamza Javed
Synthesis Engineer at Altera
Old Toronto, Ontario, Canada
Summary
👤
Senior🎓
Top SchoolHamza Javed is a synthesis engineer with 11 years of experience specializing in compilers and FPGA deployment, currently applying his expertise at Altera in Old Toronto. He holds a perfect 4.0 M.Sc. from McGill and has driven research that significantly improved sparse neural network throughput and FPGA resource efficiency through novel compiler-led partitioning and FIFO smoothing. His open-source work on hls4ml enhanced the Quartus backend and report tooling, enabling more robust ML-on-FPGA workflows for low-latency applications like CERN’s trigger systems. He has built production-oriented ML and hardware systems—from a RAG-based AI developer assistant that halved issue resolution time to patent-pending adaptive RTL for dynamic DNN inference—bridging compiler theory with practical silicon constraints. A seasoned educator and mentor, he has led instruction for cohorts of 750+ students and managed large TA teams while maintaining hands-on research and engineering roles. Unusually, he pairs deep compiler-type theory (position-dependent types in HLS) with real-world FPGA deployment experience across Arria and Stratix families.
10 years of coding experience
4 years of employment as a software developer
Exchange Student, Exchange Student at Minnesota State University, MankatoBS, Electrical Engineering, 3.81/4.0, BS, Electrical Engineering, 3.81/4.0 at Pakistan Institute of Engineering & Applied Sciences (PIEAS)M.Sc., Electrical and Computer Engineering, 4.0/4.0, M.Sc., Electrical and Computer Engineering, 4.0/4.0 at McGill University
Github Skills (6)
fpga10
machine-learning10
hlsl10
python9
neural-network8
onnx7
Programming languages (2)
Github contributions (5)
fastmachinelearning/hls4ml
Jul 2020 - Dec 2020
Machine learning on FPGAs using HLS
Role in this project:
ML Engineer
ML EngineerContributions:20 commits, 1 PR, 7 comments in 5 months
Contributions summary:Hamza primarily focused on enhancing the Quartus backend for the hls4ml project. Their contributions involved bug fixes within the Quartus writer, including adjustments to precision declarations. The user added features for building the project with Quartus synthesis, updated the report parsing capabilities and report output, and implemented support for a compressed implementation. This suggests a focus on improving the tool's functionality and performance for FPGA deployment.
pytorchpythonvivadofpgasonnx
hamzajaved780/hamzajaved780.github.io
Feb 2018 - Jul 2021
Contributions:12 pushes, 1 branch in 3 years 5 months
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