Han Zhang
Design Verification Engineer
Los Angeles, California, United States
Summary
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Top SchoolHan Zhang is a Design Verification Engineer with 8 years of experience, currently at Apple in Los Angeles, bringing deep expertise in CPU architecture, AXI/PCIe interfaces, complex state machines and synthesizable RTL. He combines strong academic credentials (M.S. EEE, USC, 3.96 GPA) with hands-on verification internships at Arm and Tsinghuaic, where he developed MBIST flows, Tcl automation and memory erase-mode checkers. Fluent in SystemVerilog/UVM, C/C++, Python and familiar with industry EDA and debug tools (VCS, Verdi, JasperGold, ModelSim, Questasim, Vivado), he bridges hardware design and software verification effectively. Han also mentors and grades at USC, reflecting an aptitude for teaching and tooling improvements (grading scripts and student support) that complements his engineering impact.
7 years of coding experience
1 year of employment as a software developer
Master's degree, Electrical and Electronics Engineering, 3.96/4.0, Master's degree, Electrical and Electronics Engineering, 3.96/4.0 at University of Southern CaliforniaBachelor's degree, Automation, 3.48/4.0, Bachelor's degree, Automation, 3.48/4.0 at Beijing University of Technology
Github Skills (4)
surface9
simulator9
simulation8
evaluation7
Programming languages (3)
Github contributions (5)
HanZhang39/A-pex
May 2022 - Mar 2024
Contributions:1 push in 1 year 10 months
HanZhang39/MultiObjectiveSearch
Mar 2024 - Jul 2024
Contributions:2 pushes, 1 branch in 3 months
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