Haocong Wang is a software engineer with six years of experience specializing in GPU performance engineering and high-performance kernel development. He drove operator and kernel optimizations across AMD architectures (RDNA2–RDNA4, CDNA1–CDNA4), notably leading multi-precision matrix multiplication work on MI300 to accelerate AI inference. At AMD he combined back-end development, INT8 support and 3D convolution fixes with a focus on composable kernels that abstract hardware complexity and improve compiler interactions. Now based in Pudong, Shanghai, he continues to apply low-level performance expertise at ByteDance while maintaining contributions to prominent open-source projects like AMD’s MIOpen. His academic background in CFD (Tokyo Tech) and process engineering (Zhejiang University) informs a methodical, physics-aware approach to numerical and performance problems. Colleagues value him for turning deep hardware knowledge into pragmatic, measurable speedups for real-world workloads.
6 years of coding experience
4 years of employment as a software developer
Master of Engineering - MEng, CFD, Master of Engineering - MEng, CFD at Tokyo Institute of Technology
Bachelor of Engineering - BE, Process equipment and control engineering, Bachelor of Engineering - BE, Process equipment and control engineering at 浙江大学
Contributions:84 reviews, 106 commits, 26 PRs in 11 months
Contributions summary:Haocong primarily contributed to the development and optimization of kernels within the AMD's Machine Intelligence Library. Their work involved implementing tensor reorder features, which included writing optimized code for different tensor layouts and improving overall performance. Furthermore, the user addressed bugs and refactored code for INT8 support, demonstrating involvement in improving the library's functionality and efficiency. The contributions also include adding testing and fixing 3D convolution API for better performance.
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