Summary
Haofan Yang is a software engineer with 8 years of experience specializing in computer and parallel architecture, SoC design, power/performance optimization, and full-chip functional modeling. He has driven early software readiness and drastically shortened silicon bring-up at NVIDIA by leading unified functional-model methodologies and delivering fast, accurate full-chip simulators. At Google he evaluates datacenter server performance and TCO, building representative benchmarks and guiding vendors to meet large-scale deployment needs. Comfortable across C/C++, SystemC, Python and CUDA, he bridges hardware and software teams to turn pre-silicon models into production-ready systems. Notably, his academic work on low-latency on-chip networks and energy-aware mapping techniques underpins practical gains in latency and energy on real multicore platforms.
8 years of coding experience
10 years of employment as a software developer
Bachelor of Science, Microelectronics, Bachelor of Science, Microelectronics at Fudan University
Master of Applied Science, Computer Engineering, Master of Applied Science, Computer Engineering at University of Toronto
English, Chinese