Summary
Haoyu Yang is a Senior Research Scientist at NVIDIA with nine years of experience at the intersection of machine learning and VLSI/EDA, holding a PhD from The Chinese University of Hong Kong. His work focuses on ML-driven manufacturability, high-performance physical design with parallel computing, and ML security, bringing research ideas into industrial practice. He has held roles spanning academia and industry—from postdoctoral research and visiting positions at top universities to engineering and research posts at Cadence and ASML—giving him a rare blend of deep theory and production software experience. Based in Austin, he consistently applies scalable computing techniques to accelerate VLSI flows and improve yield-aware design. Notably, he transitioned smoothly from research to senior research roles at NVIDIA, reflecting rapid impact on cutting-edge EDA problems.
9 years of coding experience
3 years of employment as a software developer
Bachelor of Engineering (BEng), Electrical and Electronics Engineering, 3.62/4.00, Bachelor of Engineering (BEng), Electrical and Electronics Engineering, 3.62/4.00 at Tianjin University
Exchange Study, Electrical and Electronics Engineering, Exchange Study, Electrical and Electronics Engineering at National Tsing Hua University
The Chinese University of Hong Kong (CUHK)
Japanese, Chinese, English