Summary
Hardik Shah is a seasoned silicon validation and power-performance leader with over a decade of hands-on experience driving post-silicon strategy, execution, and program management for Intel client chipsets. He has led end-to-end HSIO validation and built Centers of Excellence that translate pre-silicon estimates into reliable post-silicon results, enabling product releases with industry-leading defect rates. Known for establishing continuous integration and regression farms, he blends deep technical expertise in power, telemetry, and system-level validation with pragmatic delivery focus. Based in Folsom, CA, he pairs an MS in Electrical and Electronic Engineering with a track record of mentoring teams and creating data-driven recommendations for senior leadership. A detail not often highlighted: he began his career designing test platforms and white papers for reproducible E2E benchmarking, a foundation that informs his systems-level rigor today.
12 years of coding experience
2 years of employment as a software developer
California State University, Sacramento
Bachelor of Engineering Electronics and Communications, Bachelor of Engineering Electronics and Communications at Hemchandracharya North Gujarat University
English, Gujarati, Hindi