Harish Kumar
Member Of Technical Staff at AMD
Hyderabad, Telangana, India
Summary
👤
Senior🎓
Top SchoolHarish Kumar is a Member of Technical Staff with 9 years of experience specializing in high-performance and heterogeneous computing across CPUs, GPUs and FPGAs. He has a strong track record at Xilinx and AMD accelerating applications via OpenCL, HLS and CUDA, and has contributed performance-focused improvements to the widely used Xilinx SDAccel examples, including AWS support and versionless xclbin compatibility. Comfortable in C/C++, Python and Linux toolchains, he blends systems-level engineering with intermediate machine learning experience—having worked on DNN pruning and embedded ML on Jetson platforms. Known for pragmatic code quality improvements and kernel-level optimizations, he brings a math-focused academic background (M.Sc/M.Tech) to complex parallel programming challenges.
8 years of coding experience
5 years of employment as a software developer
Master’s Degree, M.Sc (Mathematics) specialization in Computer Science, 7.5/10, Master’s Degree, M.Sc (Mathematics) specialization in Computer Science, 7.5/10 at Sri Sathya Sai Institute of Higher Learning
English, Telugu, Hindi
Github Skills (14)
fpga10
kernel10
opencl10
c-language10
dataflow-programming10
cprogramming-language10
dataflow10
xilinx10
performance-optimization10
optimisation10
optimization10
vectorization9
aws8
cpp7
Programming languages (3)
Github contributions (5)
Xilinx/SDAccel_Examples
Jun 2017 - Dec 2018
SDAccel Examples
Role in this project:
Backend Developer
Backend DeveloperContributions:111 commits in 1 year 6 months
Contributions summary:Harish primarily focused on modifying and optimizing OpenCL code within the Xilinx SDAccel examples repository. Their contributions involved refactoring and enhancing kernel code for vector addition, large loop CNN, and other examples. They also addressed white space and other minor code issues, indicating a focus on code quality and performance improvements for FPGA-based applications. The user also added support for AWS and versionless xclbin which improved compatibility.
cppxilinxawssdaccelfpga
hatchuta-xilinx/Vitis_Libraries
Oct 2019 - Nov 2019
Vitis Libraries
Contributions:1 PR, 18 pushes, 5 branches in 28 days
vitis
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