Harnhua 黃瀚華
Founder, VP Of Engineering at Plunify
Singapore
Summary
👤
Senior🎓
Top SchoolHarnhua 黃瀚華 is a founder and VP of Engineering with over 15 years’ experience combining hardware, software and data-driven techniques to accelerate FPGA chip design and embedded systems. As co-founder of Plunify he leads R&D, engineering management and technical marketing to apply massive compute and ML-driven heuristics for faster, higher-quality FPGA flows. His background includes platform and systems engineering roles at AMD and Xilinx, where he bridged firmware, Verilog/RTL and system software to deliver production-ready reference platforms. Known for clear technical communication and cross-cultural collaboration, he routinely translates complex customer needs into automated workflows and deployable solutions. Bilingual in English and Mandarin with working Japanese, he brings both technical depth and product-minded strategic leadership to hardware-software integration challenges.
8 years of coding experience
6 years of employment as a software developer
Hwa Chong Junior CollegeBS Electrical & Computer Engineering, BS Electrical & Computer Engineering at Carnegie Mellon UniversityMS Electrical Engineering, MS Electrical Engineering at Stanford University
English, Chinese, Japanese
Github Skills (24)
vivado9
fpga8
xilinx8
keras8
netlist7
hal6
machine-learning6
python6
pytorch6
vivado-hls6
hardware5
onnx5
parser5
analyzer4
neural-network4
Programming languages (4)
Github contributions (5)
harnhua/RapidWright
Jul 2019 - Mar 2025
Build Customized FPGA Implementations for Vivado
Contributions:5 pushes in 5 years 9 months
implementationsvivadocustomizededaplacement
plunify/InTime-Vivado
May 2019 - Sep 2021
Contributions:23 pushes in 2 years 4 months
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