Hatim Kanchwala

RTL Design Engineer at Qualcomm

Bengaluru, Karnataka, India
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Summary

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Hatim Kanchwala is an RTL Design Engineer with 11 years of experience, currently designing and optimizing micro-architecture for the Geometry Processing Cluster of Adreno GPUs at Qualcomm. He brings deep RTL expertise in SystemVerilog, timing closure and high-frequency GPU design, and a track record of high-quality micro-architecture documentation praised by peers. His background blends academic rigor from an M.Sc. at RWTH Aachen with hands-on FPGA and HLS systems work—integrating Xilinx boards into co-simulation platforms and automating bitstream toolchains for real-time simulators. Earlier projects include building a Verilog model of the historic EDSAC on open-source toolchains and advanced tracking-filter research for DRDO, reflecting a habit of tackling both legacy reconstruction and cutting-edge control problems. Based in Bengaluru, he thrives at the intersection of hardware design, automation, and performance engineering, often delivering pragmatic automation that speeds prototyping and verification.
code11 years of coding experience
job4 years of employment as a software developer
bookBachelor of Technology - B.Tech., Bachelor of Technology - B.Tech. at Indian Institute of Technology, Patna
bookMaster of Science - M.Sc., Master of Science - M.Sc. at RWTH Aachen University
bookClass XII Maharashtra Higher Secondary Certificate, Class XII Maharashtra Higher Secondary Certificate at Deogiri College Aurangabad
bookClass X Central Board of Secondary Education, Class X Central Board of Secondary Education at Nath Valley School
languagesHindi, English, German
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Github Skills (29)

fpga8
vhdl8
verilog8
eda7
asic6
abstraction6
python6
simulation6
bash5
hard-real-time5
simulations5
javascript5
linux4
web-development4
package-manager4

Programming languages (6)

VHDLC++CSCSSHTMLPython

Github contributions (5)

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librecores/gsoc-museum-edsac

May 2017 - Sep 2017

Contributions:165 commits, 53 pushes, 2 branches in 3 months
gsocgsoc-2017fpgamuseum
hatimak/vivre-card

Mar 2017 - Jun 2022

Contributions:14 pushes, 4 tags in 5 years 4 months
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Hatim Kanchwala - RTL Design Engineer at Qualcomm