Henry Styles is an architect with 9 years of experience designing silicon and SoC solutions for compute and ML acceleration, now based in the San Francisco Bay Area. He has led hardware and system architecture across startups and industry leaders—most recently driving silicon architecture at Arm and previously leading ML inference accelerator and L4 compute SoC efforts at Cruise. His background spans end-to-end SoC delivery from RTL and verification through post-silicon bring-up, with notable expertise in Linux-capable RISC-V SoCs and FPGA/OpenCL accelerator ecosystems from a long tenure at Xilinx. Henry holds a PhD in Computing from Imperial College London, and brings a rare blend of research rigour and hands-on production experience that bridges chip microarchitecture, runtime software, and system integration.
9 years of coding experience
21 years of employment as a software developer
PhD Computing, PhD Computing at Imperial College London
Contributions:39 commits, 13 PRs, 28 pushes in 1 year 10 months
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