Summary
Hongbin Zheng is a Principal Compiler Engineer in the San Francisco Bay Area with 16 years of experience building compilers and C-to-FPGA toolchains, currently leading ML compiler efforts at AWS for Inferentia and Trainium. He co-founded Polly, the LLVM loop-optimizer adopted by major companies, and has 4+ years of deep LLVM infrastructure expertise coupled with a strong academic background (D.Eng.) and multiple publications in FPGA and design-automation venues. Hongbin architected state-of-the-art HLS research frameworks and led middle-end compiler development at Xilinx, blending algorithmic innovation with production-grade engineering. His work uniquely spans software and hardware—over six years of OO software development and several years of FPGA-focused design—enabling cross-level optimizations that translate high-level code into efficient hardware. Fluent in multinational team environments, he also introduced modern development workflows (git, code review, regression testing) to research teams, accelerating delivery and maintainability.
16 years of coding experience
14 years of employment as a software developer
Doctor of Engineering (D.Eng.) Microeletronics and Solid-state Eletronics, Doctor of Engineering (D.Eng.) Microeletronics and Solid-state Eletronics at Sun Yat-sen University